LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; ENTITY MUXK IS PORT(a1,a2,a3:IN STD_LOGIC_VECTOR(1 DOWN这个有什么问题?LIBRARY IEEE;USE IEEE.STD_LOGIC_1164.ALL;ENTITY MUXK ISPORT(a1,a2,a3:IN STD_LOGIC_VECTOR(1 DOWNTO 0);S0,S1:IN STD_LOGIC;outy:OUT S

LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; ENTITY MUXK IS PORT(a1,a2,a3:IN STD_LOGIC_VECTOR(1 DOWN这个有什么问题?LIBRARY IEEE;USE IEEE.STD_LOGIC_1164.ALL;ENTITY MUXK ISPORT(a1,a2,a3:IN STD_LOGIC_VECTOR(1 DOWNTO 0);S0,S1:IN STD_LOGIC;outy:OUT S
LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; ENTITY MUXK IS PORT(a1,a2,a3:IN STD_LOGIC_VECTOR(1 DOWN
这个有什么问题?
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
ENTITY MUXK IS
PORT(a1,a2,a3:IN STD_LOGIC_VECTOR(1 DOWNTO 0);
S0,S1:IN STD_LOGIC;
outy:OUT STD_LOGIC);
END;
ARCHITECTURE one OF MUXK IS
SIGNAL tmp :STD_LOGIC;
BEGIN
PAR1:PROCESS(S0)
BEGIN
CASE S0 IS
WHEN '0'=> tmp tmpNULL;
END CASE;
END PROCESS;
PART2:PROCESS(S1)
BEGIN
CASE S1 IS
WHEN '0'=>outyoutyNULL;
END CASE;
END PROCESS;
END ;

LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; ENTITY MUXK IS PORT(a1,a2,a3:IN STD_LOGIC_VECTOR(1 DOWN这个有什么问题?LIBRARY IEEE;USE IEEE.STD_LOGIC_1164.ALL;ENTITY MUXK ISPORT(a1,a2,a3:IN STD_LOGIC_VECTOR(1 DOWNTO 0);S0,S1:IN STD_LOGIC;outy:OUT S
用CAXA吧,都是现成的 右键点布局项,选来自于样板,里面有各种标准的图框…… A0=1189*841 A1=841*594 A2=594*420 A3=420*297 A4=210*